$2 WeAct CH32V006F8U6 Mini Core board features CH32V006 RISC-V MCU, supports 3.3V or 5V I/O voltage

WeAct CH32V006F8U6 Mini Core is an inexpensive, tiny development board based on the 48 MHz CH32V006 RISC-V microcontroller and equipped with a USB-C port, a Reset button, and two rows of 12-pin headers for I/Os using either 3.3V or 5V voltage. WCH introduced the CH32V006 in 2024 as an update to the popular CH32V003 with more memory (8KB vs 2KB SRAM), storage (62KB vs 8KB flash), additional GPIOs, a wider supply voltage range, and an upgraded 32-bit RISC-V2C core. I just hadn't seen any third-party CH32V006 boards so far. The WeAct Studio board changes that. WeAct CH32V006F8U6 Mini Core board specifications: SoC - WCH CH32V006F8U6 CPU – 32-bit “RISC-V2C” core up to 48 MHz Memory – 8KB SRAM Storage – 62KB flash + 3KB "boot" flash USB - 1x USB Type-C port for power and debugging Expansion 2x 12-pin headers with GPIO, ADC, USART, I2C, SPI I/O Voltage - 3.3V

CNX Software - Embedded Systems News
Sum Ergo Demonstro

Demo by lft, released 5 April 2026

Woo! #RISCV demo in the Wild Compo at #revision2026 ! Running on the RP2350 Hazard3 cores, I'll post a link to the video once they post it

Alibaba sieht seine neue RISC-V-CPU auf Zen5-Niveau

#RiscV #DigitlaSouvereignity
golem.de/news/xuantie-c950-ali…

Hohe Integer-Leistung, Matrixeinheit für KI-Inferenz, großes Out-of-Order-Fenster: Alibaba scheint einen beeindruckenden RISC-V-Kern entworfen zu haben.

Xuantie C950: Alibaba sieht seine neue RISC-V-CPU auf Zen5-Niveau - Golem.de

Hohe Integer-Leistung, Matrixeinheit für KI-Inferenz, großes Out-of-Order-Fenster: Alibaba scheint einen beeindruckenden RISC-V-Kern entworfen zu haben.

Golem.de

Erste SSD: Samsung wechselt von ARM auf RISC-V

#RiscV #Resilienz #DigitalSouvereignity #Europa
heise.de/news/Erste-SSD-Samsun…

Samsung kündigt eine erste SSD an, in deren Controller RISC-V-Kerne sitzen. Der Hersteller verspricht eine höhere Effizienz.

Erste SSD: Samsung wechselt von ARM auf RISC-V

Samsung kündigt eine erste SSD an, in deren Controller RISC-V-Kerne sitzen. Der Hersteller verspricht eine höhere Effizienz.

heise online
Würde #China zur #EU gehören könnten wir sowas wie Milk-V Jupiter 2 selbst bauen. Aber leider müssen wir #RISC-V boards von #China teuer nach #Europa importieren ... wer findet den Fehler im System?

📡 A fascinating talk (German) by Matthias DL9MJ 🎙️ on combining RISC-V with analog RF design — resulting in TinyWhisper, a custom chip fabricated in 130nm! 🤯 🏫 Done by @ce at JMU Würzburg and importantly JKU Linz!

#HAMRADIO #HAMR #ASIC #RISCV #WSPR

🔗 https://media.ccc.de/v/eh23-open-source-chip-design-a-new-playground-for-ham-radio#t=989

Open-Source-Chip-Design — A new Playground for Ham Radio?

media.ccc.de

Inside the PIC64-HPSC: the SiFive powered RISC-V SoC that NASA intends to fly on every future mission | BonTech Labs

https://lemmings.world/post/43717830

Inside the PIC64-HPSC: the SiFive powered RISC-V SoC that NASA intends to fly on every future mission | BonTech Labs - Lemmings.world

Lemmy

Inside the PIC64-HPSC: the SiFive powered RISC-V SoC that NASA intends to fly on every future mission | BonTech Labs

https://lemmy.blahaj.zone/post/40794241

Blåhaj Lemmy - Choose Your Interface

Just saying in case you did not know yet but you can play modernized #UnrealTournament 2004 not only natively on #Linux but on #ARM as well, amazing job from OldUnreal, thanks for that. :D Maybe #RISC_V #RISCV some day?