OpenSERDES – Open Hardware Serializer/Deserializer (SerDes) in Verilog

https://github.com/SparcLab/OpenSERDES

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GitHub - SparcLab/OpenSERDES: Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology.

Digitally synthesizable architecture for SerDes using Skywater Open PDK 130 nm technology. - SparcLab/OpenSERDES

GitHub