Ed S> Going to give a 30-minute or so #SVFIG talk, recalling my work on my very first #KestrelComputerProject -- the Kestrel-1!
Great - needs a #forth I think! And a #wdc65816 perhaps, and therefore a #mos6502 and, finally, a #retrocomputing...
VertigoJust a reminder: if you're looking to follow me because of my interests in libre hardware and software hacking (including but not necessarily limited to #fpga, #Kestrel3 and #kestrelcomputerproject , #rc2014, and so on), you might also be interested in following my @vertigo account as well. I will slowly be migrating that way.
Thanks!
Briefly, what with all the concerns surrounding mastodon.social of late and the strongly expressed opinions on whether or not some should defederate with it, I'm hedging my bets and beginning the process of creating an alternate account at @vertigo .
Folks interested in following my progress with #Kestrel3 (more generically, #kestrelcomputerproject ), #vdcII (aka #vdc2), and other #fpga exploits should probably follow me there.
PCBs Designs Finished | Details | Hackaday.io
<p>I've completed the initial design for the printed circuit boards for the RC2014 computer.  This is my very first PCB design in KiCad, along with my very first 4-layer board, so I really have no idea what I'm doing.  That said, I did it anyway, and the first batch of printed circuit boards have been submitted to OSH Park.</p> <figure><img class="lazy" data-src="https://cdn.hackaday.io/images/9134751598667080661.png"></figure> <p>Nothing has been ordered yet, however.  I'm waiting to hear back from OSH's support team on one question I had after uploading the designs.  But, assuming everything checks out, I'll be placing an initial order for three circuit boards.</p> <p>The circuit boards will make use of a 14-pin DIP socket as a connector for a mezzanine circuit board.  This connector provides access to 11 digital I/Os on the FPGA, which is enough to drive an analog VGA port using discrete resistor DACs.  The pin-out of the J2 connector (as it's currently labeled on the PCB) is as follows</p> <pre class="hljs ruby"><span class="hljs-params">| Description |</span> Pin <span class="hljs-params">| Pin |</span> Description <span class="hljs-params">| |</span>-------------+-----+-----+-------------<span class="hljs-params">| |</span> R2 <span class="hljs-params">| 1 |</span> <span class="hljs-number">14</span> <span class="hljs-params">| R1
@stevelord Perhaps we can/should collaborate in the future or something. #Kestrel3 #kestrelcomputerproject My goal is to build a computer that has the look/feel of something contemporary with the Apple IIgs, Amiga, and Atari ST as well.
And, so, it begins anew.
I leave the house at 8AM. Get to work at 8:30AM. First meeting at 9AM. I leave the office around 3 to 5PM. Arrive at the gym an hour later. Leave the gym an hour after that, and after stopping to get food, it's not outside the possibility that I get home at 8PM. Feed the cats at 9PM. Crash no later than 10PM.
Folks, this is why #kestrelcomputerproject and #Kestrel3 are going nowhere fast.
I just can't get *anything* done on it with this kind of schedule. π
@jookia I'm not an expert on trustworthy systems; I defer to Bunnie. My vision for the #kestrelcomputerproject was to make hardware (and matching system software) that was entirely transparent to the motivated individual; trust in the system came through extreme simplicity, even at the cost of performance. For those who wanted different trade-offs (e.g., secure boot features), I *expected* people to fork the project.
After looking at some of the slugishness this computer exhibits, I'm noticing a pattern. The SD card access LED is lit, and remains lit, during many (but not all!) of the problems I'm facing.
This suggests to me that at least half the time, the SD cards are wear-balancing. Remember those lengthy, potentially minutes-long delays I ran into when writing to the SD card on my #KestrelComputerProject Kestrel-2DX release? Yeah, THAT effect.
So I know now it's not just me.
Forgot to tag: #kestrelcomputerproject #kestrel3
I created a new wiki page on my repository: http://chiselapp.com/user/kc5tja/repository/kestrel-3/wiki/PLA-type%20Instruction%20Decoder
This page contains source code which you can literally copy and paste into some file named "test-pla.py" (or whatever) and run using python -m unittest.
It shows how to implement a PLA-style instruction decoder for a processor.
This is significant for me because I *constantly* forget how to implement this style of logic.
Hopefully it'll be useful to others using nmigen for their projects.