I took another look at the vendor's asm code and the SiFive U7 core manual. Lo and behold!

Let me tell you a secret:
Enabling interrupts allows for triggering them. 🙃

So here we have both harts. Woop woop! 🥳

I have rebased onto #Linux HEAD (6.2 some RC) which has a lot of patches already and it's very close to a working #kexec on the #JH7100 / #VisionFive 1 now.

It says bye, but never hello again. :3 Sooo close!

I found the fix to the #DRAM issue on the #JH7100 / #VisionFive1 - missed copying one stupid function call, whoopsies!

`disable_u74_memaxi_remap(1)` - that was it.

So, in other words: @oreboot now loads the #OpenSBI + U-Boot blob successfully and runs it from the cacheable RAM.

Next week I'll recap that and then get back to drafting #RustSBI, but the rest will be for next year.