
@whitequark in my case schematics were complicated to keep track of the connections coming through level-shifters. And I was just able to flip the numbers in array until the lines stopped crossing. Before I discovered jitx I was procrastinating on that for many months. Also got machine-generated constraints file for FPGA.
Routing was easy: bulk-select pins, hit shortcut to select counterparts; repeat for others; And created ground-planes + did gerber export in kicad. Was able to do it in <1h.
@whitequark i started using jitx a year ago to create an 48-data-pin adapters from old calculators/organizers to an FPGA Alchitry Au level-shifter, so I won't need to create new bespoke level-shifter boards for all the portable devices I want to poke at.
And creating a new adapter board for a new device was basically just defining a footprint for its connector (in code!) and after that <1h of laying two connectors on a PCB and defining a Device-to-FPGA pinout that will avoid crossed lines.

#KaitaiStruct, a cross-language binary format parser generator, released a new major version 0.11! Java and Python serialization, partial object tree in the Web IDE, import fixes, `valid/in-enum` to enforce defined enum values, null-terminated UTF-16 strings and much more!
https://kaitai.io/news/2025/09/07/kaitai-struct-v0.11-released.html