LWN.net[$] CHERI with a Linux on top
The Capability Hardware Enhanced RISC Instructions (CHERI) project is a rethinking of computer architecture in order to improve system security. Carl Shaw gave a presentation at L [...]
Joshua J. Drake
- 322 Followers
- 190 Following
- 345 Posts
Securing the future through modern technology. Founder and Software Security Specialist at Magnetite Security
Hey all! Delphos Labs has gone from idea to public beta very quickly. If you haven't tried it yet, it's worth seeing in action. We take a random binary and turn it into insight what it is and does in pretty short order with zero hands on. We're conducting a survey of the RE community to optimize the impact of our future development. I recently re-posted it on LI, but I'm sending this a bit wider. We're only going to leave the survey open for one more week. This is the last chance to provide input for our next generation automated reverse engineering platform. We'd love to learn more about you and your needs! Thank you so much for your time and attention. PS. If you've given our public beta shot, we'd love to hear your feedback!
You can find the survey here: https://docs.google.com/forms/d/e/1FAIpQLSdYFpgfZkkJMo3mDvtLL56xzCtdeTu2MbvbQo0tMk2OZCOCrg/viewform
Reverse Engineering Survey
Help shape the future of automated binary analysis. We're building an AI-powered platform to automate reverse engineering tasks without source code. Whether you're triaging binaries, hunting for vulnerabilities, detecting implants, or validating third-party software, we want to understand what slows you down and how we can help. Try it yourself at delphoslabs.com Your input will directly shape what we build next. All responses are anonymous unless you opt in for follow-up.
It's official. No hacker summer for me due to family health complications. I will miss everyone but hope you have a great (and safe) time!! ❤️
dragosrTime to update microcode on your Intel processors (gen >9)...
New speculative prediction bug lets you capture /etc/shadow with 99% reliability. They didn't make anything like it work on AMD or ARM... yet...
https://comsec.ethz.ch/research/microarch/branch-privilege-injection/
https://www.intel.com/content/www/us/en/security-center/advisory/intel-sa-01247.html
https://github.com/intel/Intel-Linux-Processor-Microcode-Data-Files/releases/tag/microcode-20250512
David Amador
Jeremy Soller 🦀I have ported X11 to Redox OS in order to start working on ports that have previously been too difficult. In the future, we will be rebuilding these with wayland. Here is TWM with gtk3-demo open on the left, the embedded GL example on the right, and xterm behind. This all runs inside orbital using a custom X server video driver.
Linux Kernel SecurityRISC-V support in kernel-hardening-checker
@a13xp0p0v added RISC-V support to kernel-hardening-checker. Now, you can check the Linux kernel security parameters for RISC-V in addition to X86_64, ARM64, X86_32, and ARM.
HalvarFlakeArXiv AI papers should list a "flops needed to reproduce experiments" in the abstract.
Dr. Amy H. Sturgis 📖“I believe we are in crisis. The distance between what is said and what is known to be true has become an abyss. Of all the things at risk, the loss of an objective reality is perhaps the most dangerous. The death of truth is the ultimate victory of evil. When truth leaves us, when we let it slip away, when it is ripped from our hands, we become vulnerable to the appetite of whatever monster screams the loudest.” #MonMothma
Redox OSThis Month in Redox - April 2025
This month was very active and exciting: RSoC 2025, complete userspace process manager, service monitor, available images and packages for all supported CPU architectures, minimal images, better security and many other improvements.
