Tomorrow will be my last day at Cloos, and wow, it was quite a ride. Sad to leave an awesome team and all the cool welding robots behind. Glad that part of my work got open source:
https://codeberg.org/Cloos/grintimeI gave a talk on this project at open source summit in Dublin:
https://youtu.be/sEjqIHXd4LE@dzu das Konzept klingt plötzlich sehr schlüssig
Flower powered PCIe research
What a nice birthday present: A philosophy of software design by John Ousterhout. So much of the stuff good programmers do by instinct precisely carved into text. Highly recommended.
Ok, it is not a firewall problem. Just WSL using a NAT interface that can't simply talk to port 1234. After moving to bridged networking it's all fine. And I have downloaded my first LiteScope trace 🥳
A little late for Christmas. Awesome job from JLC. Now my Colorlight i9 has two network ports 😁 Will test it later.
Got my video pattern generator and a litex VexRisc core baked together. Now the CPU can control the pattern generator via the CSR register interface. LiteX rocks!
Soldering 180 throughole pins is a strangely wholesome experience.
Running a VexRiscv core on a Colorlight i9 board using litex. Such a cool and inexpensive FPGA development platform!
@tubetime saleae hacking: replaced the plastic feet with neodym magnets, so I can attach it to the wall of a control cabinet
