DRAM pricing is killing the hobbyist SBC market

Today Raspberry Pi announced more price increases for all Pis with LPDDR4 RAM, alongside a 'right-sized' 3GB RAM Pi 4 for $83.75. The price increases bring the 16GB Pi 5 up to $299.99. Despite today's date, this is not a joke. I published a video going over the state of the hobbyist 'high end SBC' market (4/8/16 GB models in the current generation), which I'll embed below: But if you'd like the tl;dr:

Jeff Geerling

Helium supply issues are only going to make this worse.

I feel like for the first time in our lives we might have seen peak technology for the next few years. Everyone is going to have to make do instead of depending on ever increasing performance.

Ultra clean rooms with massive air handling systems can't recapture all their helium?

Or is this just a temporary thing based on where processing is located?

Helium is almost all captured from gas wells by cryogenically liquefying the nitrogen out of it. I guess you could do technically do that with the fab's air but it is a LOT of volume of air to liquefy and likely costs more than even inflated helium prices.

Most helium from most wells is simply vented because it is expensive to separate even with its relatively high concentration, and I imagine even the best case scenario for capturing it from a fab has abysmal concentration of helium. But because most of it is vented it also means if the capital is put down to build more helium separators on gas wells it wouldn't take long to increase supply. Short term for a year or two it can be a problem, but beyond that it is simply a cost versus demand issue. There is neither a technological nor source limitation, it is a pure capital investment limitation.

AFAIK they recapture most, but recapturing all simply isn't possible / financially feasible. And they use a lot of helium, so even if they capture most of it, the losses are still higher than the currently available supply.
How does the helium demand differ by fabrication node? Do leading-edge nodes use more and trailing-edge nodes less of it, or is it more or less the same for a wafer no matter what the node?