@pervognsen
ok, so let's say APU is already snapshotted, and the CPU tries to read APU's memory, but the APU is behind.
So I guess it passes a message to the APU "gimme memory at address 0x1234".
The APU dutifully records that message, and doesn't reply, since it's already snapshotted.
The CPU needs to wait for the reply, but it will not get one before resume, so it needs to sit in a safe point...
which is what OP was trying to avoid
@pervognsen I got all excited because I thought you meant IO serialization until I started reading the article. >_<
Though this is a more interesting topic than I would have expected!