I really can’t wait until gpu resetting on Linux will become a thing…

Many motherboards (especially reference boards from silicon vendors or laptops) allow you to enable/disable power to the slot by controlling the GPIO (SoC pincontrol).

You can spot this by looking for “rtd” in src/mainboard/* directory in coreboot tree, there are pins specified for PCIe power and reset.

Imagine being able to cut the power to something like a dedicated GPU in your system by setting PCIE_PWR pin low and decreasing your desktop power’s consumption by ~30W (or even ~80W if you happen to use first-generation Intel Arc GPU).

Then when you want to play a game, you would set the pin high, DRM would re-initialize the card, and you could either play as-is (displays connected to iGPU would cost you some performance due to DMA framebuffer copy) or press the button on (very inexpensive these days) DP/HDMI switch and play with full performance straight from dGPU.

Of course none of that would be required if board vendor would implement ASPM correctly, but vast majority of board vendors fuck up their power management/board designs, so that would be nice to have.

(One day I will go insane enough to design an open-source ATX board that would implement everything correctly and use STM32 as an Embedded Controller)

@elly I'm confused, DRM has had support for this for over 10 years using ACPI. It power gates the GPU after 4 seconds of lack of use.

Maybe coreboot doesn't expose the right methods?

@mupuf I think it's just the cursedness of my board. I thought I had it working at one point, but then NVME fell of the bus
(it's https://doc.coreboot.org/mainboard/erying/tgl/tgl_matx.html)
Erying Polestar G613 Pro — coreboot 26.03-11-g493770d730 documentation

@elly @mupuf ah yeah, the issue I was debugging where the GPU fell of the bus after power cycling. the workaround was to disable some PCI power management feature on the bridge prior...