Daniel Bittman
dram🎀
jan-leila@dramforever I believe that the CPU itself sometimes will schedule actions out if order so even if you have 0 optimizations compile side the CPU will still do its own
@jan_leila Fortunately I specifically excluded that by saying "acquire/release (RCpc)"
👽🐦🦇🐉💻@dramforever myth?
just do it over the network, I'm sure it will be all fine. :)
just do it over the network, I'm sure it will be all fine. :)
Greg Bell@dramforever @gsuberland processors were not meant to synchronize. You've made a race condition with anxiety. Absolute fools, etc
bartholin (Grzegorz Brzęczyszczykiewicz arc)@dramforever isn't this about gcc removing these instructions during optimization, because it thinks they serve no purpose?
lain@bartholin @dramforever :ebussy: usecase for instructions?
John Regehr@dramforever examples, please
@regehr i don't have a concrete one that i can share immediately, but i had someone ask me "why are atomics needed? this works perfectly fine" on a concurrent spsc circular buffer queue that worked entirely relying on compilation unit barriers acting as compiler barriers, word sized load and store being atomic, and x86 tso behavior. running the same program with tests on arm immediately breaks, and so does turning on -flto