furiously clicking through the histories of various microprocessors on wikipedia so i can figure out who to blame for the fact that you can't push/pop a single byte to the stack on the gameboy in an atomic fashion (you can only push/pop register pairs). a fact that led to a stupid bug that took me two days to figure out
(as far as i can tell, the gameboy's SM83 has it because the Z80 has it, and the Z80 has it because the Intel 8080 has it, but I can't figure out what the Intel engineers were thinking when they decided this is how it would work on the 8080. Stanley Mazor wrote about the design process of the 8080 here https://ieeexplore.ieee.org/document/4287219 but on the topic of push and pop he only says "Push and Pop instructions were needed for each of the three register pairs.")

@aparrish

I think it was just a practical convention inherited from those who came before them at IBM and other places.

From the perspective of business machines, it would rarely make sense to push data that's not word-sized data.

Which is still the same rationale ARM, Intel, AMD follow to date.

@aparrish

But you can still do

DI
DEC SP
LD (SP), A
EI

For most intents and purposes indistinct from a theoretical PUSH A

@haitchfive alas the gameboy doesn't let you load directly to SP—you either have to go through HL (LD SP, HL or LD HL, SP+n) or use the PUSH/POP instructions and adjust the stack pointer after with INC SP/DEC SP. (which leads to the problem I encountered: if an interrupt occurs between the POP and the DEC SP, a byte on the stack gets overwritten by the interrupt handler pushing the return address!)
@aparrish @haitchfive if you want to do this byte shenanigans, you have to PUSH then INC; and to reverse you have to DEC then POP. Which i _think_ is interrupt safe, and may even end up restoring to the same 8-bit register (but it trashes the other one in case of interrupt, haha).
@drj @haitchfive alas it is not interrupt safe (which is what caused the annoying bug that took me so long to figure out in the first place!)

@aparrish I think there is an interrupt safe sequence tho. And i think it is DEC then POP. Because you avoid leaving live data below SP (at addresses < SP). In the DEC POP sequence i have illustrated below, L gets trashed, it is loaded with an unpredictable byte from memory.

I do think this is a lot of shenanigans, but i suppose i can see the point if you have a VM or mini-Forth-like that is doing a lot of byte-oriented stack ops. And re timing, i can see your original complaint. Now we are looking at 16/17 clocks instead of what morally should be 7.

(sorry, i got rather nerd-sniped by the problem)

@drj hmmm, thank you for thinking this through! i had push then inc for my "push byte" word but it hadn't occurred to me to do dec then pop for "pop byte" (and in testing I just assumed that interrupts were breaking both of them). i might try this out!
@drj (works like a charm, btw, thank you for being open to the nerd snipe)