niconiconiMar 15
Optimizing IRQ latency on the STM32H743 @ 480 MHz, perhaps for NES ROM emulation... Best result so far: 100 nanoseconds input-to-output latency when the vector table and the IRQ handler are relocated to Tightly-Coupled Memory without making HAL calls. Not bad, but the GPIO controller (several buses away) looks like the real performance killer here. WARNING: buggy code, see correction https://mk.absturztau.be/notes/ajvb448y305b01i4. #electronics #STM32
Show thread✧✦Catherine✦✧Mar 15
@niconiconi H743 has an interconnect designed by crackh^W^W quite questionably; I can't imagine using it for anything that latency sensitive over a much simpler MCU
Show threadniconiconi
@whitequark My original plan was emulating all the memory mapper logic using only naive C code on the CPU for accessibility, so I just grabbed a random MCU devboard with high f_max and Flash space. When I read about the interconnect bottleneck in the H7, the board was already in transit. Now, I find myself with a board and I'm trying random things with it. ​​
Mar 15 at 11:49amWeb