Novel patterning technologies are tackling one of chipmaking’s persistent challenges: topography. Researchers recently highlighted new approaches to flatten semiconductor surfaces and accelerate development workflows. 💡 #Lithography #Semiconductors #CHIPS
Canon Nanotechnologies presented a new planarization approach built on #nanoimprint #lithography, using inkjet deposition to place controlled droplets across a wafer, filling low areas. A glass wafer presses the material flat before curing. Tests reduced height variation from 12 nm+ to about 2 nm.
#Intel also highlighted the growing role of maskless #lithography. Maskless tools enable rapid experimentation. Engineers can quickly create arrays of lines and spaces across a wafer to study process limits or intentionally write defects into patterns to test #metrology systems. 📏