@wren6991 Hi. Do you think that in the next RP MCU revision PWM slices could be able to drive A as inversion of B input (clock gated) and count both up and down depending on B level? Even just counting up on high while inverting would be cool, if not as precise.

Because then with `IN-(PWM_B-C-GND)-R-PWM_A` you'd get a nice delta sigma ADC with R/R settable gain.

Pretty please?

@wren6991 I am not asking for all GPIOs to be able to drive PU/PD as inverse of input (basically opposite of bus keep, gated, possibly divided down) so that an external RC would suffice to make any pin into a basic low-Z ADC.

That would be crazy, right?