mit41301
Z80 and MCS-51 SBC on a MAX 10 FPGA
Design and Implementation of Zilog Z80 or Intel 8051 SBC on a MAX 10 FPGA. System ROM, RAM and UART all implemented inside FPGA using VHDL. By mit41301.
Hackster.io
Design and Implementation of Zilog Z80 or Intel 8051 SBC on a MAX 10 FPGA. System ROM, RAM and UART all implemented inside FPGA using VHDL. By mit41301.