Álvaro PrietoDo you have a J-Link compact and wonder why it only works with _some_ USB-C cables? I looked into why that is 🤬
Luke Wren@alvaro I'd guess the 2 x 10k vs 1 x 5k is a BoM optimisation? But yeah it's funny to see this in the wild on a board presumably designed after the first production rev of Pi 4
Timon 🛠@wren6991 @alvaro yea smells like 2x10K parallel being on purpose to save the extra reel and they only ever intended to short the CC lines together.
Wild to still see this error being made 10y into USB-C adoption, really wonder where that comes from, there gotta be some wrong guidance around this somewhere.
Wild to still see this error being made 10y into USB-C adoption, really wonder where that comes from, there gotta be some wrong guidance around this somewhere.
@timonsku @alvaro Because an engineer sees this circuit in the spec and says "oh so I only need one of them". It's almost irresistible.
Also the same shortcut is correct in other areas, like in theory the sink detects orientation of CC1/CC2 to select the correct D-/D+ pair, but every USB 2.0 board I see just shorts the two pairs together. As far as I know this is valid.
@timonsku @alvaro The USB C spec should probably lead with "use exactly this circuit with no deviations if you just want 5V" because those are the people who will dedicate the least time to reading the spec. Committees are too excited about their favourite pet feature to think about how people use the docs they write.
That schematic does exist later on (pic), and I understand the point of view that this is a normative circuit and it's your fault if you implement anything different. On the other hand the way the shorted CC lines fail with an e-marked cable is only obvious with the benefit of hindsight, so I sympathise with people who make this mistake.
twosky2000@wren6991 @timonsku @alvaro [help me understand]
So the problem is that the CC is measured/forwarded to the sink chip after pulldown resistor and not before?(I don't get the 2x 10k, but I think it boom optimisation is ok, but it has been done wrong.)
I guess the CC shorting is problematic, especially for the ones that just think USB 2.0 and ignore CC/keep a false minimum. So likely devices that were developed for USB 2.0 micro.
And here I'm unsure, the reference has passive sink (apple).
@twosky2000 @timonsku @alvaro The problem is the short across the CC lines at the sink causes the source to see the sink-side 1k resistor on the opposite CC line on an e-marked cable
@twosky2000 @timonsku @alvaro You can't see the problem in this diagram because this type of cable works fine. You need to look at the e-marked cable diagram in Alvaro's blog post