I'm in need of some advice from an #aarch64 #asm guru 🙏
I'm trying to do something (that I thought was) rather straightforward but for some reason LLVM has decided that ORRing the X0 register with 5 is not a cool thing to do. ORRing with other decimal values work just fine.
Am I missing something here?
Okay, so, it turns out that logical OR with an immediate value is something of a dark art on aarch64 (https://dinfuehr.com/blog/encoding-of-immediate-values-on-aarch64/).
I've instead resorted to doing an add instruction. This is okay because I've cleared the lower 3 bits of X0 in the instruction before.
birdgoose