Matthew GarrettFuckery delayed because microSD cards are, largely, awful
Ha found a working one
Hardware is good (red screen is because Pistorm doesn't handle bus arbitration properly so the CD drive can't be probed)
I have successfully turned the screen white. Having proven the overall concept, my next step is to port Doom.
("But Matthew", I hear you ask, "Isn't Doom, But On The Amiga already available?", to which I say "Yes, and that is not what I am doing, at least not in the way you think I am, and also what are you doing in my house")
This is not quite going to be @foone levels of fuckery but it is going to be the closest I've done for a while
Interestingly I do need to run Kickstart before this works, so there's some register state needed here that I'm not explicitly setting (I'm setting the palette registers, DMACON, BPL*PT, DIWSTRT/STOP, DDFSTRT/STOP, BPL*MOD, BPLCON*, COP1LC*, not touching anything else)
Symptoms seem to be that writing anything to chip RAM and then reading it back doesn't show the writes landing, do I need to do something to turn on decode there?
Ahhhhhh the ROM starts off overlayed over RAM ok
Hmm setting 0xbfe001 to 0x2 should disable overlay and turn on the power LED, but neither appears to be happening and reading it back gives 0xff so where are my CIAs
Solving this in the most stupid possible way (dumping every register access from the emulator code, including that in my setup code, bisecting until things work)
This is just full on bewildering now, executing exactly the same set of register writes just does… nothing to the CIAs? Even sticking an extra sleep in the way does nothing. Time to poke shit further.
Oh FFS apparently it's necessary to hit the reset pin for the hardware to work even if it's just come up from cold?
Ewen McNeill@mjg59 it’s pretty common for hardware to require a reset cycle from outside at power on in order to trigger initialisation of registers / state to a “known starting state”. Otherwise you get “whatever charge the flip flops happened to have at power on”, and or janky state from power rails coming up.
Most older microcomputers have a RC circuit or timer to assert reset for some ms until they’re sure power is stable and reset steps happened.
@ewenmcneill in this case the CPU apparently needs to execute reset as the first instruction
@mjg59 that’s somewhat unusual (historically it is a board wide reset signal to all chips).
I guess they chose that approach as it ensures the chipset gets reset after the CPU has started executing code.