metait seems i cannot enable dci dbc on this jasperlake nuc without some form of violence against the computer 😔
step 2: oh boy, the writes don't work
step 3: oh boy, the writes WORK
am I allowed to change a bit in the PCH straps without turning this into a brick?
it seems like SiSetup (with "platform debug consent") doesn't actually live with the other non-volatile variables on this flash? i think the defaults are baked into the FSP at compile-time and I can't change them because bootguard :|
maybe i'll work up the courage to try this tonight, if I can figure out which PCH strap bits turn on DCI (and hopefully not turn this into a brick lol?)
lol well, I'm pretty sure I set the right bit. machine isn't hosed, but nothing happened :< chipsec still convinced that DCI is disabled. i get the impression that i still need to make sure all the right knobs are enabled in the configuration on nvram
holy smokes! it works!