as is typical in the Amiga community, the mods have been done in such a way to make them hard to reverse engineer. in this case, the rework wire is hair-thin magnet wire covered in silicone. try to remove the silicone, and it shreds the wire.
my guess is that it taps into the BA6986FS spindle motor driver and allows the PAL to slow it down when a high density disk is detected.
simple board.
the schematic is pretty simple. looks like it does the pin swizzle for the disk change signal, creates the READY signal the amiga needs, but then it does some clever stuff with the index pulse. additionally, it uses the two reserved pins and the unused drive select line presumably to plumb the rework wires.
soldered some wires to the rework wires to help figure out where they go.
gotcha!
ok I've replaced the wires with bigger and more visible ones. lol.
so presumably the way this works is that the two bodge wires hook into the clock signal from the controller chip to the spindle motor controller (pin 7 on this example). the motor controller derives the RPM from this signal, so the external PAL sneaks in an additional divide by 2 in order to half the RPM. not too shabby!
updated schematic. now that i know what all the pins do, it'll be much easier to reverse engineer the PAL. i'll take a crack at that tomorrow.
now for the DuPAL.
while that's running I'll put the board back together with a socket.
ran the outputs of DuPAL through Espresso to get the logic equations. i'm making a few assumptions so this probably has errors.
yeah these are wrong. i'm trying to dump it as a combinational 16L8 but i need to spend some time with the manual pin manipulation tool. the product terms depend on themselves in a bunch of places, creating flip flops.
ok it's got this weird state machine which, as it turns out, is used to *clock out a drive type value* using the drive select line as a clock and the ready pin as a data output!
yeah so that state machine clocks out 1010... continuously which corresponds with the ID value of AAAA AAAA; the Amiga interprets that as a high density drive.
there may have been a bad connection in the socket, i tried it again (also as a 16L8) and these equations look a lot better. i've started adding better net names.
another thing that i like to do is take a bunch of extra time to *understand* each product term. that involves using boolean algebra and DeMorgan's theorem to manually rearrange the terms.
here's the 2-bit counter that generates the drive ID code. it's a little asynchronous state machine. i just write up little notes like this as i figure things out.
and i've simplified the equations and gotten rid of excess terms about as much as i can. i understand what all the outputs do now, including the ones used to store intermediate states and never used in the external circuit.
the next step is to put the equations into either WinCUPL or galette so we can try writing them to a real PAL.
gah! i forgot how utterly awful both WinCUPL and galette are!

first attempt at PAL equations in galette--umm--did not match the real thing at all. i'm swapping parts into the DuPAL to compare how they perform for the same inputs.

UNFORTUNATELY i've discovered that DuPAL cannot differentiate between a tri-stated output and a low output, even though the hardware is capable of doing that. 😩

oh i should just tag the guy who wrote DuPAL. @hkz very useful tool, can i have this tiny feature added to DuPAL Peeper? basically when you do a read, toggle the SIPO_O_7-14 lines and see if PISO_I_1-8 change at all. if they do, then they are hi-z.
bam! that was amazingly fast. so it turns out the output pin here, O13, used to drive the READY pin, goes hi-z when the drive select line is high. this is as expected. interestingly, it's driven either high or low when the drive select is low and the PAL is clocking out the drive ID code (1010... meaning it is a high density drive).
I think it's time to probe this device in circuit. I've attached the Saleae to most of the pins of the PAL.
you can see the drive ID protocol here. first it pulses the motor enable (with a drive select) to reset the state machine. then you get a bunch of pulses to clock out the data on the ready output (D7)
and this is what happens when you put a double density disk in the drive. so the drive ID gets read every time there is a disk change, and the adapter changes the drive type depending on the disk!
ok wow a few minor tweaks to the galette PLD file and the crazy thing works! I still need to test it with the Teac drive but I've managed to replicate the PAL.
the PAL code is not very complicated. i was able to remove a bunch of terms that `espresso` added (spuriously). i also made some minor improvements.
now for the most difficult part: what should i call my clone of "The Real HD-Drive"?
the layout for the board is simple. i'm making minor changes so it fits better in the Sony drive.
that was easy.
Herr Doktor Diskettenlaufwerk!
ok maybe this is better and somewhat more german. i kinda ran out of space for the text, which i guess makes it more authentic

OK, i haven't fabbed it out yet, but I don't foresee any issues, so here's the repository!

https://github.com/schlae/amiga-hddlw

GitHub - schlae/amiga-hddlw: Adapts a regular PC floppy drive for high density operation on an Amiga computer

Adapts a regular PC floppy drive for high density operation on an Amiga computer - schlae/amiga-hddlw

GitHub
boards arrived! I can't wait to try it out but I need to buy some 34-pin shrouded headers.
@tubetime Awesome work mate! Thanks for all your efforts! Can you please tell me on the Sony mod, is the JC40 a part that is desoldered from another location on the drive, or is it an additional one? (can't find it in the BOM)
Thanks!!!
@salaxi it is a jumper or 0 ohm resistor. you can use a piece of wire.
@tubetime Thanks a whole lot! BTW, are you having the pcb for sale anywhere, or upped on, say, pcbway?
@salaxi nope, but it's easy to upload the fab package to your favorite service.
@tubetime That's great! Just ordered a Sony to try this. Had a Power Computing external HD drive bought new decades ago, but its' GAL went kaputt. Time to get back in action..
@tubetime Received the boards from PCBway. Waiting on a set of sockets and then i will update on testing.
@tubetime Almost there! I was a bit confused with the A500's floppy power connector CN12, because they use red color on the 12v cable...
Just need some cleaning and mod the drive now.
@tubetime Just finished modding the TEAC drive, all is ok!
@tubetime Here's my video take on the build. It might all sound Greek to you, but i managed to embed English subtitles:
https://www.youtube.com/watch?v=hzqAyf1p15I
Η τελειότητα στην μετριότητα ΕΠ. 13 Amiga HD floppy drive

YouTube