so i have picked up an INS8900D, also known as the National Semiconductor PACE. it is the first commercial 16-bit microprocessor. let's take it for a spin!
according to the datasheet, it is an NMOS device, and it requires three power supply voltages: 5V, 12V (!) and -8V (!!). the 5V supply is for the IO, the 12V supply is for the core voltage, and the -8V supply is the substrate bias.

using the resistors, i wired the 16 data lines to the NOP instruction. and the CPU appears to be running!

on top is the clock trace (12V logic!) and in the middle is the IDS (input data strobe), and on the bottom is the NADS (address strobe). yes, the chip has NADS.

i've added some 74-series latches to demux the address lines from the data lines. to get it to fit in a 40-pin package, the address bus is muxed with the data bus. the LEDs indicate the current address, and they count up! the program counter is counting.
the next step is to add some program memory. it is all 16 bit, so i am using two 8 bit flash memory chips.
i guess i should write a program. there is an assembler that supports this architecture (http://john.ccac.rwth-aachen.de:8000/as/) but i'll get that working later. for now i will just write it in machine code.
The Macro Assembler AS

and we have a blinking LED! this is being driven from one of the 4 flag outputs on the CPU.
the bus timing looks like this. the top trace is the clock, then there is NADS, IDS (input data strobe), and finally the F11 output (which is driving the LED). i cheated and slowed the clock down for the video so you could see it blink.
@tubetime Everyone note the lack of address buss....

@tubetime

is there any criticality to the order that power supplies come up on with three voltage NMOS parts? is it possible to damage a part if one voltage is missing?

@bitsavers don't think so as long as none of the voltages go below the -8V rail
@tubetime +12V was common for early NMOS, before depletion loads, but usually Vgg (before substrate bias generators) was -5V. Oddball Vgg voltages were sometimes specified in order to have better performance or better margins. A few chips, even in production (!) had a Vgg value determined by production test hand-written on the IC package!

@tubetime

somewhere, I have a source paper tape with PACE BASIC

it is very NOVA like

if you want to play with it, I have a PACE LCDS
http://bitsavers.org/components/national/pace/LCDS

Index of /components/national/pace/LCDS

@tubetime Happy new year! 😊 How about building a MicroNova from it?
@elosha it is Nova inspired but sadly not compatible.
@tubetime I love it! My very first homemade computer (25..30 years ago now) was wired up on a breadboard very much like that, and even now there's still plenty of magic watching yours come to life. Nice job!
@tubetime from the description on https://www.cpu-world.com/CPUs/PACE/index.html it sounds like a nice architecture but unfortunately very slow.
@tubetime AFAIK NSC only called the original PMOS version PACE, and always referred to the NMOS version by the INS8900 part number.
Oddly enough, the NMOS version had the same timing specifications, rather than being faster than PMOS.
Years ago I discovered that the commonly found scans of PACE fig-forth were missing a page, and also had another serious bug. My corrections are on Bitsavers. The author of PACE fig-forth said that as far as he knew, no one else had ever used it.