I'm working on a new FPGA project. this one is rather complex.
I'm at the "blink an LED" stage of bringing it up.
wrote some temporary verilog to validate the bus interface using a single 16-bit register. here goes nothing
oops. logic analyzer time. guess i should have expected it.
ok so i unplugged the board and powered up the computer -- and the error stays. looks like i broke something. 😩
gotta take this step by step. I should have checked this at the start but first I will force the FPGA into the unprogrammed state (-CRESET low) then check each pin to make sure it's in a valid state.
ok when *not* in reset, the FPGA is pulling the DMA line BURST_L low constantly. this is bad, and explains the 00011320 error i saw earlier.
seems that i typo'd the wiring between the top level verilog module and the module that handles the micro channel bus. it's a floating connection and it seems to mostly just sit at a logic 0.
the other problem (01290200) is more concerning and will need a logic analyzer.
yes, i made a dedicated interposer/extender board just to help with the logic analyzer connections. it's called the Fing Longer (a reference to Futurama).

@tubetime may I suggest either some of these adaptors, or replicating / building them in next time

I hate having 30+ of those fiddly clips, so I grabbed some

@nroach44 i have some and tried them but the flex cable part is too stiff and was making it hard to type
@tubetime ah that's fair. I'm thinking when I get around to needing them I'll include them in the debug board so you just connect the 40pin cables straight on