Brent RubellMay 17, 2023
niconiconi
Silicon bugs be like... The worst-case scenario is when the datasheet is public but the chip bug errata is only explained in an NDAed document. #electronics
Oct 8, 2022 at 10:33pmWeb
Show threadWilliam D. JonesMay 16, 2023

@niconiconi @koz The most recent revision of the 6551 UART transceiver has a "feature" according to the datasheet, where the "TX buffer empty" bit is always on. This means that it's constantly triggering interrupts.

According to ppl familiar w/ the issue on 65xx forums, what actually happened was "there was a bug in the software used to simulate the silicon level design that missed a short", and the bug wasn't caught until it was too late.

I wish the datasheet was more honest.

Show threadNiclas HedhmanMay 17, 2023

@niconiconi

LOL.

I have personally worked to detect 2 silicon bugs.
In 1985; Intel 8031, 1980 revision; In UART Mode 1, if a serial interrupt happened on the same clock cycle as a timer interrupt, both ISRs would execute, but only one return address pushed on the stack. No workaround figured out.

In 1997; Microchip PIC16C73. If serial interrupt on the same clock cycle as a timer interrupt, both ISRs would execute, but only one return address pushed on the stack. Software workaround found.

Show threadNiclas HedhmanMay 17, 2023

@niconiconi

Intel's response; "NO, there is no such bug.", "We can prove it.", "NO, you are wrong!"
Before shutting down the company, one guy suggested we try with a newer revision in the dev kit. It worked with the 1982 revision, and bankruptcy averted.

Microchip's response; "Oh! You are right. We can reproduce it. You have a software workaround? GREAT! We will give maximum discount for life, no matter what quantity you buy! Thanks again!"