A Guide to CubeSat Mission and Bus Design

A Guide to CubeSat Mission and Bus Design

A Guide to CubeSat Mission and Bus Design
Computer architecture has always fascinated me. Central processing, I/O, memory, devices - so much to control. Back in the day when I was a manager at AST, we floated the concept of an arbitrated, multi-master bus - capable of handling multiple processors in an arbitrated internal environment. The notion was quickly squashed by Intel at the time, for obvious reasons (it focused on the bus, not the processor). Today, with multiple core processors and threading, much of the functionality we envisioned can be delivered by a single, multi-core processor. But just imagine a bunch of those on an arbitrated bus capable of handing off control, I/O and memory to the processor that needs it. I think it is still an awesome idea. But since I’m not a hardware architect, what do I know? #ComputerArchitecture #BusDesign