wenzellabsMar 20

time will tell...

#fpga #bare_metal #ice40 #ice40up5k #yosys

wenzellabsMar 3

der FPGA-Teil vom FPGA-Hackerstacker is schon fertig, lange bevor ein board existiert.

ja, hier ist das display noch falsch, bekommt eine ganz andere Geometrie.

@overflo

#fpga #hackerstacker #digitus16 #up5k #ice40up5k #amaranth #bare_metal #baremetal

Sikorski Arkadiusz vel ArakuSAug 30, 2024
FPGA development board in a #microSD form factor
C0-microSD
#Lattice #ICE40UP5K #FPGA
5280 logic cells
120 Kbit dual-port Block RAM
1 Mbit (128 KB) single-port RAM
#Renesas #AT25QL128A SPI Flash
128 Mbit (16 MB) non-volatile memory
Programmable I/O pins:
Two on-board leds (one red and one green), for status indication.
Six programmable I/O pins (from the microSD interface)
Five additional programmable pins on test pads
Built-in #Signaloid C0 #RISC-V processor core
Built-in bootloader, allowing you to load new FPGA bitstreams or RISC-V applications via the SD interface
raboofMay 4, 2022
@uglyhack what makes an #FPGA 'open-toolchain-compatible'? I did a workshop with the #iCE40UP5K and I don't think I needed any propietary software for that (I used arachne-pnr 20180909 from Debian).