@guix Other than as package manager on top of #archlinux, I’m using #guix for electronics design, mostly #vhdl and #fpga related stuff.
I run simulations with help of #hdlmake using #ghdl compiler, #osvvm for verification, #cocotb for testbenches, #yosys for synthesis, #nextpnr for placement and routing and #openFPGALoader for flashing. Finally, I use my own Guix channel to package gateware and run #ci tests on #sourcehut Guix image. A demo toy example of this runs here
https://builds.sr.ht/~csantosb/job/1500903#task-compile_osvvm
custom #makefile testing
https://builds.sr.ht/~csantosb/job/1500903#task-test
#hdlmake simulation
https://builds.sr.ht/~csantosb/job/1500903#task-test_hdlmake_sim
and #yosys synthesis
https://builds.sr.ht/~csantosb/job/1500903#task-test_hdlmake_synth
Uses verification #osvvm library and #openlogic standard #vhdl, along with #ghdl for simulation, #hdlmake for project creation and #yosys for synthesis.
All dependencies are manipulated with a declarative manifest file.
https://git.sr.ht/~csantosb/ip.alu/tree/test/item/.builds/manifest.scm
Cayetano Santos